IOCP-74 Frequently Asked Questions

Listed below are questions frequently asked by our customers regarding this product. Every attempt is made to provide the latest information, however, all information is subject to change over time. When in doubt or if your question can not be answered here please contact SCIDYNE directly.

How many IOCP-74 units can be used by one host?
The IOCP-74 does not inherently impose any restrictions. However, a host may limit the actual number of units that can be used for several reasons. Each IOCP-74 requires 8 consecutive locations within the host's I/O map. These locations can be configured to begin on any 8-byte boundary that does not interfere with other host peripherals. A typical XT/AT style host PC has 1024 I/O locations. Of these, many are occupied by standard, peripherals, thus reducing the actual number of free locations. If your application requires separate interrupts, another limitation may be in the number of interrupts available on the host. As a solution to this problem, the IOCP-74 supports shared interrupts which allows all the IOCP-74s to use the same interrupt channel. The only drawback to shared interrupts is a slightly longer execution time during the interrupt service routine to poll and determine which peripheral actually generated the interrupt.

Do the 12-bit analog inputs and outputs require an external Vref?
No, the references are generated on board. The IOCP-74 uses the Linear Technology LTC1298 12-bit Analog-to-Digital converter chip which derives its reference voltage from the 5V Vcc supplied by the host computer. The 12-bit analog outputs are generated by a LTC1446 chip which includes an internal reference.

Is the serial communication port Full or Half-Duplex?
Both modes, as well as Simplex, are supported. The PIC USART allows transmission and reception at the same time (Full-Duplex). The IOCP-74 interface hardware and IOCPbios has been designed with this in mind. In the case of RS485, a 2-wire configuration will always be Half-Duplex. Also some protocols, MODBUS for example, are inherently Half-Duplex.

In relation to the host, is the IOCP-74 MEMORY mapped or I/O mapped?
The IOCP-74 is I/O mapped and occupies eight consecutive locations. The starting address can configured on any 8-byte boundary within the hosts I/O map.

Which PIC microcontrollers are supported?
The standard IOCP-74 is shipped with a PIC16C74/JW, although it supports most 40 pin DIP PIC family member, including the '74, '77 ,'874, '877 and newer PIC18 series devices. In the case of FLASH devices, the IOCP-74 can be customized to work directly with MPLAB-ICD for simple In-Circuit-Debugging, programming and rapid software development. The required microcontroller signals (MCLR/VPP, RB3, RB6 and RB7) are readily accessible. A modular connector can be placed in the prototyping area and wire jumpers used to attach it to the appropriate IOCP-74 signals. Microchips MPLAB-ICD Header can also be used.

What other tools do I need to begin working with the IOCP-74?
As a minimum you will need: a computer for software development, the Microchip MPASM cross assembler or MPLAB (both are available free from Microchip), a PIC16Cxxx burner (PICstart or similar) and a UV eraser. You will also need a PC/104 host computer, although the same computer used for software development can also serve this purpose. Having additional blank PIC microcontrollers is also helpful. Ideally, development would be done using an emulator and a high-level language such as PIC-BASIC or C. The MPLAB ICD from Microchip is an inexpensive in-circuit debugger which can greatly simplify the development process.

How fast and how much data can be transferred between the host and IOCP-74?
There is no definitive answer because each application has its own set of unique operating characteristics. Keep in mind the real value of the IOCP-74 lies in its ability to be programmed to perform sophisticated front-end operations independent of the host. The transfer rate is often several magnitudes slower and does NOT show the speed at which the IOCP-74 will run applications locally. However, as an indication of transfer potential we have benchmarked the IOCP-74 using the standard IOCPbios, a 12-byte (6 word) data array and a 25mhz 386SX host computer running a C program. The sustained transfer rate was 51khz (ie: a 1 byte transfer every 19.6us or the entire array in 235us). Ultimately, the maximum transfer rate is determined by several factors. Since some applications are concerned with transferring X amount of data in Y amount of time, knowing how these factors affect the transfer process will help determine suitability of the IOCP-74 for a particular application. It should also be noted that the four I/O ports available for user expansion circuitry are accessed separately from the PIC and are not affected by the transfer rate.

  1. Each time the host accesses the IOCP-74 processor (via the Parallel-Slave-Port and IOCPbios) a PIC interrupt is generated. The PIC will have a certain latency before it can service the interrupt and prepare for the next host access. The total number of other PIC interrupts used, the burden those interrupts impose and the overall efficiency of the PIC software will directly influence the worst-case latency time. If the host tries to access the PIC too quickly, before it has completed servicing the first access, data can be lost and/or the two processors can get out of sequence. Techniques to avoid this situation often involve using a slight inter-access delay (16us or so) on the host or by programming the IOCP-74 to automatically interrupt the host when new data is available.

  2. The amount of data that can be passed depends upon the size of the read and write arrays created within the PICs RAM. These arrays hold the data being exchanged between the host and IOCP-74. The standard IOCPbios has arbitrarily set these arrays to 16 bytes (8 words) each. A single equate in the IOCPbios source code lets the user increase or decrease the array sizes as needed.

  3. The speed at which the host hardware performs the actual read or write operations on the IOCP-74 also has an effect. However, this is usually not significant except with the slowest of host processors or if the host bios is configured to generate long wait-states during I/O operations.

Can you suggest any books or other sources of useful PIC hardware and software information?
Due to the PICs popularity there are numerous sources of information sources. Magazines such as "Circuit Cellar, Ink" , "EDN" and "Nuts and Volts" frequently have a articles showing there use in many innovative and diverse applications. You should certainly visit the Microchip web site. It contains lots of free downloadable source code covering a variety of applications. In addition, there are also several independent web sites and news groups offered by PIC enthusiasts. A few of the books available on the subject are listed below. Searching for "PIC" on any of the internet book stores will certainly return a more complete list.