GPIO-104 Frequently Asked Questions

Listed below are questions frequently asked by our customers regarding this product. Every attempt is made to provide the latest information, however, all information is subject to change over time. When in doubt or if your question can not be answered here please contact SCIDYNE directly.

Does the GPIO-104 provide isolation between the I/O signals and the PC/104 host?
There is no electrical isolation circuitry provided. The ADIO-104 was designed to keep the I/O signal path as "pure" as possible and to offer a competitively priced product that would satisfy many typical applications. However, if isolation is required it can be accomplished externally. This is typically done using Analog Devices xB type modules or similar components which accept field signals, provide isolation and scaling and then present them to the GPIO-104 in the proper voltage range.

What limits the maximum sampling rate of the analog inputs?
The analog inputs are based on Maxim's MAX197 DAS chip. This device, using the on-board 2mhz crystal clock, can perform one (internally self-timed)acquisition/conversion on a single channel in about 9us (the reciprocal of which yields the 100ksps specification). However, several other issues must be considered when determining the actual maximum sampling rate a particular application can achieve. In general, the maximum sampling rate for any one channel is inversely proportional to the number of channels being used. To avoid data loss, the result of each conversion must be read and stored before a new conversion can be started. The overall time taken by the host to respond, read the result, store the result and initiate a new conversion must be added to the basic acquisition/conversion time. In addition, a certain variability exists in the host's response time due to interrupt latency and its involvement in other tasks. Using a fast computer will help achieve the highest sampling rate. Also make sure the software directly controlling the MAX197 is kept short and to the point. It's best to leave scaling, filtering and other time-consuming duties to upper level routines.

Do I have to use interrupts for the analog-to-digital converter?
No. Depending on your application requirement, the analog-to-digital converter can also be operated by polling the DAS bit of the INTR_STATUS register or by simply starting a conversion and waiting longer than the overall acquisition/conversion time.

During a system reset the digital channels go high. Is there a way to keep them low?
The digital channels are controlled by an 82C55A peripheral interface chip. This device resorts to high-impedance inputs during a system reset. The GPIO-104 uses 10k pull-up resistors on all 24 digital I/O channels to keep the channels in a known initial state and to allow simple interfacing to external switches, contact closures and open-collector devices. As a consequence, the channels go high while a system is starting up, before the application software has initialized the chip. One solution is to use a 'strong' external pull-down resistor on the offending digital channels. During the start-up time the external pull-down and the 10k pull-up will form a simple voltage divider. The pull-down resistor should be chosen so that the voltage divider produces a voltage below the logic '1' threshold of the external device being controlled. After the application software has initialized the 82C55A, the digital channel becomes an output and is actively driven by transistors within the 82C55A. At that point the voltage divider has little effect because it gets over-ridden by the high and low states of the digital output. Another possibility is to use an external transistor or inverter to change the polarity of the digital channel. However, this may require that the controlling software be changed to reflect the new polarity.